!DOCTYPE html> FERRO-PCM — Photonic Memory Architecture

FERRO-PCM Photonic Weight Memory

Diamond-Integrated Non-Volatile Photonic Memory — Interactive Architecture Simulation

IDLE
SiN @ 1550 nm
T = 300 K
FERRO-PCM Non-volatile photonic weight cell · 0 pW static power · 65 fJ write · optically readable at 1550 nm · candidate for DRAM-free MVM inference · vs DRAM reload: 192 pJ/weight (array-level, not per-read)
Device Cross-Section — Single Cell
FE Polarisation
±Pr → ±σ_b
Gate Field
through 1nm Al₂O₃
Graphene E_F
Kubo formalism
Pauli Blocking
E_F > 0.40 eV → transparent
Optical Weight
evanescent coupling SiN
MVM Output
Ge PD + 3-bit ADC
Write Bus METAL INTERCONNECT V_write pulse
TiN Electrode TiN — 10 nm Top electrode
Al:HfO₂ Gate
+Pr → E_F > 0.40 eV
Al₂O₃ Seed Al₂O₃ — 1 nm ALD nucleation
Graphene PAULI BLOCKED — TRANSPARENT E_F = 0.52 eV
SCD(111) ◆ SINGLE-CRYSTAL DIAMOND (111) k = 2200 W/m·K — Graphene growth template + thermal spreader Route F: Ni-catalysed graphitisation — graphene grown IN PLACE on this surface
Bonding Oxide SiO₂ — 10 nm δ = 263 nm evanescent
SiN Waveguide
SiN 330 nm × 3 µm — TE₀ @ 1550 nm IL ≈ 0.1 dB/µm
SiO₂ CLADDING + Ge PHOTODETECTOR + 3-bit ADC
FERMI LEVEL
0.52eV
Blocking threshold: 0.40 eV
CARRIER DENSITY
1.6×10¹³cm⁻²
n_block = 1.18×10¹³ cm⁻²
OPTICAL STATE
PASS
IL ≈ 0.1 dB/µm
EXTINCTION RATIO
3dB/cell
FDTD taper geometry
WRITE ENERGY
0fJ
Xu et al. 2025
RETENTION
10yr
Projected, no opt. load
V_GATE (corrected)
1.49V
Incl. C_Q correction
Controls
Polarisation +Pr (UP)
Graphene TRANSPARENT
Weight State W = 1 (ON)
Static Power 0 pW
Write Operations
Read / Inference
Array Operations
Cumulative Write Energy
Session total 0 fJ
0vs DRAM: 192 pJ/weight
Operation Log
64×64 MVM Tile — 16×16 Display (click cells to toggle)
W=1 Pauli blocked (transparent)
W=0 Absorbing
ON cells
128
OFF cells
128
Array write energy
0 fJ
vs DRAM equivalent
0 pJ
Static inference power
0 pW